1. Field of the Invention
The present invention relates to an amplifying electronic circuit, and, in particular, to an amplifying electronic circuit having a single-end push-pull formation output.
2. Description of the Related Art
FIG.1 shows an amplifying electronic circuit in an example of the related art. This amplifying electronic circuit 1 includes a bias circuit portion 2 which applies a bias to an input signal, a differential amplifying circuit portion 3 which amplifies the input signal, an output circuit portion 4 which outputs the amplified input signal, a constant-electric-current circuit portion 5 which supplies driving constant electric currents to the differential amplifying circuit portion 3 and the output circuit portion 4, and feedback circuit portion 6 which controls the amount of feedback.
The bias circuit portion 2 includes resistors R.sub.1, R.sub.2, R.sub.3, and a ripple removing capacitor C.sub.1. A signal source 7 supplies a signal, to be amplified, to the bias circuit portion 2 via a direct-electric-current removing capacitor C.sub.2. The bias circuit portion 2 applies a bias to the thus-supplied signal, and supplies the signal to the differential amplifying circuit portion 3.
The differential amplifying circuit portion 3 includes PNP transistors Q.sub.1 and Q.sub.2 which act as input transistors, and NPN transistors Q.sub.3 and Q.sub.4 which act as a driving electric current source. The input signal, which has a bias applied thereto by the bias circuit portion 2, is supplied to the base of the input PNP transistor Q.sub.1. An output signal, which is controlled by the feedback circuit portion 6 is supplied to the base of the other input PNP transistor Q.sub.2. The differential amplifying circuit portion 3 noninverting-amplifies the input signal and then supplies it to the output circuit portion 4.
The output circuit portion 4 includes NPN transistors Q.sub.5, Q.sub.6, Q.sub.7, PNP transistors Q.sub.8, Q.sub.9, resistors R.sub.6, R.sub.5, and a capacitor C.sub.3. The output circuit portion 4 is a push-pull output circuit, power-amplifies the signal supplied by the differential amplifying circuit portion 3, and outputs the amplified signal to a load capacitor C.sub.L and a load resistor R.sub.L. During this operation, an electric current for generating an idling electric current is always supplied to the output circuit portion 4 from the constant-electric-current circuit portion 5 in order to prevent a crossover distortion from occurring around the cut-off levels of the NPN transistor Q.sub.7 and the PNP transistor Q.sub.9.
The feedback circuit portion 6 includes resistors R.sub.f and R.sub.i. The resistor R.sub.f is connected between the output node of the output circuit portion 4 and the base of the PNP transistor Q.sub.2 which acts as the input transistor of the differential amplifying circuit portion 3. The other resistor R.sub.i is connected between the resistor R.sub.f and the inter-connection point of the resistors R.sub.1, R.sub.2 and R.sub.3 of the bias circuit portion 2. Thereby, the differential amplifying circuit portion 3 is configured as being a noninverting amplifying circuit.
The constant-electric-current circuit portion 5 includes a constant-current source 8, PNP transistors Q.sub.10, Q.sub.11, Q.sub.12, and resistors R.sub.7, R.sub.8. The constant-electric-current circuit portion 5 includes a current-mirror circuit. A power-supply voltage Vcc is supplied by a power supply 9 to the constant-electric-current circuit portion 5. The constant-electric-current circuit portion 5 generates a driving electric current from the supplied power-supply voltage Vcc, and supplies the driving electric current to the differential amplifying circuit portion 3 and the output circuit portion 4.
Setting of the idling electric current in the output circuit portion 4 will now be described. In the output circuit portion 4, each of an emitter area ratio between the transistors Q.sub.5 and Q.sub.7 and an emitter area ratio between the transistors Q.sub.8 and Q.sub.9 is assumed as being `n`. Further, symbols will be used for various factors as follows:
the base-emitter voltage of the transistor Q.sub.5 : V.sub.BE5 ; PA1 the base-emitter voltage of the transistor Q.sub.7 : V.sub.BE7 ; PA1 the base-emitter voltage of the transistor Q.sub.8 : V.sub.BE8 ; PA1 the base-emitter voltage of the transistor Q.sub.9 : V.sub.BE9 ; PA1 the emitter electric current of the transistor Q.sub.5 : I.sub.E5 ; PA1 the emitter electric current of the transistor Q.sub.7 : I.sub.E7 ; PA1 the emitter electric current of the transistor Q.sub.8 : I.sub.E8 ; and PA1 the emitter electric current of the transistor Q.sub.9 : I.sub.E9. PA1 V.sub.T : the thermal voltage (VT can be expressed as V.sub.T =kT/q, and V.sub.T .apprxeq.26 mV, where the temperature thereof is 25.degree. C.); PA1 I.sub.C : the collector electric current; PA1 I.sub.S : reverse-direction collector saturation current (being in proportion to the emitter area); PA1 V.sub.CE : the collector-emitter voltage; and PA1 V.sub.A : the Early voltage. PA1 a third transistor which supplies the collector electric current which is 1/K.sub.1 times the collector electric current of the second transistor where K.sub.1 is the current-mirror ratio between the second and third transistors; PA1 a fourth transistor having the collector and base connected with one another, the fourth transistor supplying an electric current according to the collector electric current of the third transistor; and PA1 a fifth transistor, the base electric current of which is controlled by the base electric current of the fourth transistor, the fifth transistor supplying the collector electric current which is K.sub.2 times the collector electric current of the fourth transistor to the base of the first transistor.
It is assumed that the amplification factor h.sub.FE Of each transistor is h.sub.FE &gt;&gt;1. Thereby, a base electric current can be considered to be zero with respect to a collector electric current and a base electric current can be considered to be zero with respect to an emitter electric current. A feedback current i.sub.f is assumed such that i.sub.f &lt;&lt;I.sub.E7. EQU V.sub.BE5 +V.sub.BE8 =V.sub.BE7 +R.sub.5 .multidot.I.sub.E7 +R.sub.6 .multidot.I.sub.E9 +V.sub.BE9 =V.sub.BE7 +V.sub.BE9 +(R.sub.5 +R.sub.6).multidot.I.sub.E9 ( 1)
The NPN transistors Q.sub.5, Q.sub.7 and the PNP transistor Q.sub.8, Q.sub.9 are assumed as being configured such that the NPN transistors Q.sub.5, Q.sub.7 are symmetrical with the PNP transistor Q.sub.8, Q.sub.9. Further, it is also assumed that R.sub.5 =R.sub.6. Thereby, it is possible that the emitter electric current I.sub.E7 of the transistor Q.sub.7 is equal to the emitter electric current I.sub.E9 of the transistor Q.sub.9. Further, it is enough to consider a relationship between the transistor Q.sub.5 and the transistor Q.sub.7 when the above-mentioned equation (1) is considered.
Therefore, when the equation (1) is considered, it is enough to consider only the following equation (2): EQU V.sub.BE5 =V.sub.BE7 +R.sub.5 I.sub.E7 ( 2).
Generally speaking, the base-emitter voltage V.sub.BE of a transistor is expressed by the following equation (3): EQU V.sub.BE =V.sub.T .multidot.lnI.sub.C /{(1+V.sub.CE /V.sub.A).multidot.I.sub.S }! (3);
where:
When the equation (2) is rewritten using the equation (3), ##EQU1## (Because it is considered that the base electric current is substantially zero with respect to the collector electric current and with respect to the emitter electric current as mentioned above, it is possible that I.sub.C7 can be considered to be equal to I.sub.E7.) ##EQU2## The equation (5) can become the following equation (6): EQU V.sub.T .multidot.ln{I.sub.C7 /I.sub.C5 .multidot.(1+V.sub.CE7 /V.sub.A7)/(1+V.sub.CE5 /V.sub.A5).multidot.I.sub.S7 /I.sub.S5 }=R.sub.5 .multidot.I.sub.C7 ( 6).
In the equation (6), I.sub.S7 /I.sub.S5 corresponds to the above-mentioned area ratio `n`. Further, the collector current I.sub.C5 of the transistor Q.sub.5 is approximately equal to the collector current I.sub.C12 of the transistor Q.sub.12 which supplies an electric current to the transistor Q.sub.5. Thereby, the equation (6) becomes the following equation (7): EQU V.sub.T .multidot.ln{I.sub.C7 /I.sub.C12 .multidot.(1+V.sub.CE7 /V.sub.A7)/(1+V.sub.CE5 /V.sub.A5)}.multidot.n!=R.sub.5 .multidot.I.sub.C7( 7).
Generally speaking, in a power amplifier or the like, setting is performed such that an output electric current flows in an amount 100 times to 1000 times the idling electric current. The value of R.sub.5 .multidot.I.sub.C7 in the equation (7) is as small as tens of millivolts according to a design of such a semiconductor device.
It is assumed that V.sub.T .multidot.ln{I.sub.C7 /I.sub.C12 .multidot.(1+V.sub.CE5 /V.sub.A5)/(1+V.sub.CE7 /V.sub.A7)}in the equation (7) is sufficiently larger than R.sub.5 .multidot.I.sub.C7. That is, EQU V.sub.T .multidot.ln{I.sub.C7 /I.sub.C12 .multidot.(1+V.sub.CE5 /V.sub.A5)/(1+V.sub.CE7 /V.sub.A7)}&gt;&gt;R.sub.5 .multidot.I.sub.C7( 8).
It is possible that the following equation (9) is obtained; EQU I.sub.C7 =I.sub.C12 .multidot.{(1+V.sub.CE5 /V.sub.A5)/(1+V.sub.CE7 /V.sub.A7)} (9).
A diode connection is performed for the transistor Q.sub.5. Therefore, V.sub.CE5 is equal to V.sub.BE5. V.sub.BE5 .apprxeq. 0.7 (V), and is constant. Therefore, V.sub.BE5 does not substantially depend on the power-supply voltage. EQU V.sub.CE7 .apprxeq. (1/2)Vcc (10).
This is because, generally, in a single-end push-pull electronic circuit, an output center voltage V.sub.OUT is set to (1/2)Vcc.
In the above-mentioned equation (9), the collector electric current I.sub.C7 of the transistor Q.sub.7, which current corresponds to the idling electric current, is obtained from the following equations (11) (corresponding to the above equation (9) ): EQU I.sub.C7 =K.multidot.I.sub.C12 (1+V.sub.CE7 /V.sub.A7) (11),
where
K=1/(1+V.sub.CE5 /V.sub.A5).
Thus, in the related art, the idling electric current I.sub.C7 is determined from the collector current of the transistor Q.sub.12 which supplies the driving electric current, the emitter area ratio between the transistor Q.sub.5 and transistor Q.sub.7, and resistance values of the resistors R.sub.5 and R.sub.6.
FIG.2 shows characteristics of the idling electric current with respect to the temperature of the device in the related art.
As shown in FIG.2, the idling electric current tends to increase as the temperature of the device increases.
FIG.3 shows characteristics of the idling electric current with respect to the power-supply voltage in the related art.
As shown in FIG.3, the idling electric current increases as the power-supply voltage Vcc increases. As shown in the equation (10), V.sub.CE7 depends on the power-supply voltage Vcc. As shown in the equation (11), the idling electric current depends on V.sub.CE7. Therefore, the idling electric current depends on the power-supply voltage.
In the related art, the idling electric current being supplied to the output transistors in the output circuit portion varies depending on the temperature of the device and power-supply voltage as discussed above. Thereby, it is not possible to provide a stable output signal.